Networked and Embedded Systems Laboratory

Lastname: Cho

Firstname: Young

Middleinitial: H

Webname:

Email: youngcho@isi.edu

Url: http://www.isi.edu/~youngcho

Urlphoto: http://www.oasysresearch.com/yc_mug1.jpg

Phonework: 310-448-9107

Phonehome:

Phonecell:

Fax: 310-825-7928

Addressoffice:

Addresslab:

Addressmail:

Department: Computer Networks

Urldepartment: http://www3.isi.edu/div7-home.htm

Organization: USC Information Sciences Institute

Urlorganization: http://www.isi.edu

Biography: Young Cho graduated from UC Berkeley with a bachelors degree in Computer Science. While attending Berkeley, he was in a research project group called NOW ,Networks of Workstations. From July of 1996 to August of 1999 he worked as an engineer/programmer at Myricom, Inc. Myricom is the main network interconnect technology provider for the majority of the fastest clustered computers in the world. He took a leave of absence from Myricom after three years to return to academia. He began his Masters program in Computer Engineering at UT Austin in Fall of 1999. By Spring of 2001, he completed his Masters of Science in Engineering from Electrical Computer Engineering department while working for UT Research Laboratory Applied Research Laboratory in the University of Texas at Austin. Then he moved to Los Angeles to attend University of California, Los Angeles for the doctorate degree in Electrical Engineering under his advisor William Mangione-Smith. In June of 2005, he completed his Ph.D. on the dissertation topic of Advanced Computer Network Security. He then came to Washington University in St. Louis as a Visiting Assistant Professor in Computer Science Engineering department. On July of 2007, he leveraged all of his prior expertise to independently start a technology company, Open Acceleration Systems Research, specializing research and development of various high-performance applications using commodity-off-the-shelf (COTS) components. He is also a post-doctorol scholar at Networked & Embedded Systems Laboratory (NESL)of UCLA.

Researchinterests: Young Cho has background in the areas of embedded systems, computer architecture, and computer networks. His recently research includes high-performance image compression, high-performance IPSec accelerators, dynamic thermal feedback control and accurate benchmarking of modern processors, and sensor network localization and time synchronizations.

Education:

Professionalexperience: - 21 years experience in formal procedural/object oriented programming languages - 17 years experience in logic to system level computer architecture designs and instruction - Thorough understanding of FPGA and ASIC design languages and methodologies - Proficient in co-designing systems using both software and hardware - Successful development of commercial products using state-of-the-art technologies - Demonstrated management skills through leading successful research teams and teaching - Extensive experience in research and development of emerging technologies - Long term vision for technical trend to anticipate and plan for the future goals - Extensive list of publications in competitive technology conferences, journals, and books - Ability to write successful research and development grant proposals - Demonstrated analytical, investigative and problem-solving capabilities - Team-oriented with superior communication and project management skills

Professionalservice: Reviewer - IEEE Transactions on Computers - IEEE Transactions on VLSI - IEEE Journal on Selected Areas of Communications - International Journal of Security and Networks - IEEE Transactions on Dependable and Secure Computing - ACM Transactions on Embedded Computing Systems - IEEE/ACM International Symp. On Microarchitecture (MICRO) - ACM FPGA - EURASIP JES - IEEE Field Programmable Logic - IEEE International Symposium on Circuits and Systems - International Journal on Computer Languages, Systems, and Structures - SPIE Journal of Electronic Imaging Session Chair - Globecomm 2005 Membership - IEEE (EE) and ACM since 1999

Otherpublications: <a href="http://www.isi.edu/~youngcho/pub">A complete publication list</a>

Patents: 1 "HIGH-PERFORMANCE CONTEXT-FREE GRAMMAR PARSER FOR POLYMORPHIC MALWARE DETECTION," International Patent No. WO2006113722, Published on October 26, 2006, Inventors: Young H. Cho and William Mangione-Smith, Applicant: University of California. 2 "METHOD AND APPARATUS FOR DEEP PACKET INSPECTION," International Patent No. WO2006031496, Published on March 23, 2006, Inventors: Young H. Cho and William Mangione-Smith, Applicant: University of California. 3 "PROGRAMMABLE HARDWARE FOR DEEP PACKET FILTERING," International Patent No. WO2005104443, EP1738531, Published on November 3, 2005, Inventors: Young H. Cho and William Mangione-Smith, Applicant: University of California.

Awards: - Outstanding CS152 (Undergraduate Computer Architecture) Teaching Assistant Award - 1996 - Altera University Award Scholarship - 2000 - John Deere Scholarship - 2003

Skills: Operating Systems: Various UNIX based systems (Linux, BSD, Solaris, AIX, and etc.), Windows based Systems, and Berkeley Mote Sensor node (TinyOS) Hardware Platforms: Field Programmable Gate Arrays (Xilinx, Altera, and ORCA/Lucent) Hardware Tools: Cadence ASIC Design Tools, Xilinx ISE, Altera Quartus, and Modelsim Development Languages: VHDL, Verilog, AHDL, C, C++, Java, Basic, Pascal, Visual C++

Interests:

Secretary:

Bs year: 1996

Bs title: BA

Bs school: UC Berkeley

Bs field: Computer Sciences

Bs in lab: false

Ms year: 2001

Ms title: MSE

Ms school: UT Austin

Ms field: Electrical and Computer Engineering

Ms thesis: Implementation of a 3-D Sonar Beamformer Using the Computational Process Network Model on a Synergy Quad PowerPC G4 with AltiVec Board

Ms in lab: true

Phd year: 2005

Phd title: PHD

Phd school: UCLA

Phd field: Electrical Engineering

Phd thesis: Deep Content Inspection for High Speed Computer Networks

Phd in lab: true

Miscattributes:

Person category: #<PersonCategory:0x007f418ebabef0>

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