Networked and Embedded Systems Laboratory

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This paper presents techniques to integrate the
use of Single Instruction Multiple Data (SIMD) functional units in
a high-level synthesis (HLS) design methodology. SIMD functional
units can be configured to operate in one or more SIMD modes,
in which they process multiple sets of smaller bitwidth operands
in parallel. Conceptually, the use of SIMD functional units enables
HLS to (i) exploit parallelism to a higher degree without using
additional resources, (ii) improve resource utilization by enabling
hardware re-use at a fine-grained level, and (iii) improve energy
efficiency for a given area and/or performance constraint.
We illustrate the issues involved in performing high-level synthesis
with SIMD functional units, and discuss how algorithms
involved in a typical high-level synthesis flow can be enhanced
to result in maximal performance and energy improvements.
These techniques are not restricted to specific high-level synthesis
tools/algorithms, and can be plugged into any generic high-level
synthesis system. Experimental results indicate that, the use of
SIMD units can improve performance by up to 1.9X (average of
1.57X), and simultaneously reduce energy consumption by up to
33.16% (average of 28.03%) compared to well-optimized conventional
designs, with minimal area overheads (average of 2.18%).
The performance improvements can be translated into additional
energy savings, resulting in upto 66.26% (average of 55.88%) energy
reductions. Further, our experiments demonstrate that, the
use of SIMD units in a HLS tool results in a shift in the entire area-delay-
energy tradeoff envelope that can be obtained, to include desirable
parts of the design space (i.e., higher quality designs) that
were hitherto unreachable.

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